Our core products are a number of microprocessor cores.

Our newest core, which is currently under development and will be released in 2013.
Our world’s smallest and fastest 32-bit RISC open-source microprocessor core. It is capable of running two hardware threads with a single-issue 5-stage integer pipeline. It uses the Wishbone legacy bus and has hardware exception support.
The AEMB is a 32-bit RISC with a single-issue 4-stage integer pipeline. It uses the Wishbone bus for communicating with external peripheral cores. It has support for a single global hardware interrupt.

Now deprecated.