Small and Fast
Every chip design engineer knows that when it comes to digital design, there is a classic speed to area trade-off. In essence, a fast design tends to take up more chip resources while a small design tends to run a little slower. This little rule is drilled into the minds of every engineer during chip design class.
What they forgot to add is that it’s possible to shift the entire curve down and make designs that are both small and fast.
This is what we are particularly good at.
We are home to the smallest and fastest 32-bit RISC microprocessor core as independently benchmarked by researchers from TU Delft. Our library of IP cores are all designed with this singular objective in mind – to be both small and fast.
All our designs are open-source and employ the Wishbone bus protocol. This makes it compatible with a host of other open-source cores available from around the world. Our designs are also vendor neutral and work well with different target technology.
Our users have reported up to 40% reduction in chip resource usage when compared against alternative platforms.
We provide front-end design services from the architecture onwards. There is a lot to be gained by designing highly efficient cores from top to bottom. Hardware efficiency is particularly important for power constrained designs.
Please contact us to discuss your needs.